COLLOQUIUM Tian He Department of Computer Science and Engineering University of Minnesota Date: November 21 Time: 1530-1630 (3:30-4:30pm) Place: Swearingen 1A03 (Faculty Lounge) Abstract For decades, many researchers have been focusing on wireless networks in which devices are assumed to be ready to receive incoming packets, ignoring the fact that idle listening dominates energy consumption, especially in emerging low-rate low-power wireless transceivers (e.g., 802.15.4). To reduce the energy costs of idle listening, a device must reduce its duty-cycle by sampling RF channels very briefly and shutting down for long periods. At any given time, this type of network is actually fragmented and network connectivity becomes intermittent, wherein a sender suffers sleep latency, i.e., a delay waiting for an intended receiver to wake up. With the increasing gap between the long lifetime requirements and slow progress in battery technology, low-duty-cycle networking is a crucial future foundation for many energy-constrained wireless applications (e.g., low-power sensing, actuation, tagging and alert). However, the little research that has been done in this area predominately focuses on individual physical designs and the need for network-level research becomes increasing important. This talk introduces the latest development in low-duty-cycle networking research with the focus on how to optimize networking performance (e.g., delay, reliability, and cost) in the presence of sleep latency, unreliable links and dynamic energy availability. Dr. Tian He is currently an associate professor in the Department of Computer Science and Engineering at the University of Minnesota-Twin City. Dr. He is the author and co-author of over 150 papers in premier wireless network journals and conferences with over 14,000 citations (h-index 48). Dr. He is the recipient of the NSF CAREER Award, McKnight Land-Grant Professorship and five best paper awards. Dr. He served as general or program chair positions in several international conferences and on many program committees. He currently serves as an editorial board member for six international journals including ACM Transactions on Sensor Networks and IEEE Transaction on Computers. His research includes wireless sensor networks, intelligent transportation systems, real-time embedded systems and distributed systems, supported by the National Science Foundation, IBM, Microsoft and other agencies and corporations.

Interested in the future implications of Artificial Intelligence? Enjoy a good philosophical and scientific discussion? Come to ASBMB's Science and Philosophy event "Artificial Intelligence - Will the Machines Take Over?", discussing the future implications of Artificial Intelligence from many different viewpoints! The event will feature a panel of professors from many different disciplines; Dr. Michael Huhns and Dr. Marco Valtorta of the Computer Science and Engineering Departments, Dr. Susan Vanderborg of the English Department, Dr. Joseph November of the History Department, and Dr. Michael Dickson - the department chair of the Philosophy Department. The event will be at 7 pm on November 17th (NEXT MONDAY), in Honors Residence Hall B111. All majors are welcome, and refreshments will be served!

SPEAKER: Chase Gray TITLE: Controlling Drones Across the World with JavaScript VENUE: Amoco Hall, Swearingen Building TIME: 3:30pm-4:30pm on Nov 14th (Friday) ABSTRACT: Silicon Valley now has more opportunities than it ever has in the past. When I was studying at South Carolina, it all seemed so far away and unreachable. I had no idea how to try to get a job at Google or a small startup. Now that I'm there I can't walk down the street or into a bar without someone trying to convince me to leave my current job to join their company. During my talk we will go over what the job market and hiring process is like at many companies in Silicon Valley. I will discuss some examples of what it is like working at Google & my current startup, DroneDeploy. At DroneDeploy we use a cellular connected drone to send back images and data while in flight to ground control stations written in JavaScript on any browser and any location in real-time. I will go over what DroneDeploy does and a bit of how we accomplish it. We will go over some details about projects we are working on at DroneDeploy and the types of people we are looking for to join our team. BIO: Chase graduated from USC with a Master's in computer science in 2008. During his last year in school, he started Ratchet Software and launched its primary product, MyHealthcareSource.com to provide parsing and processing of healthcare financial data in an easy to use format. Ratchet Software was doing well, so he relocated to South America and continued to focus building the business over the next few years. In 2012 he accepted an offer at Wildfire Interactive, which was acquired by Google a few weeks later. At Google he focused on integrating Wildfire's analytics suite with Google systems and moving some of their products to Google's new JS Framework, AngularJS. In 2014, Chase left Google to join a team of ex-googlers and Ph.Ds to make it possible for anyone to collect useful data using drones from a simple interface on any device. At DroneDeploy Chase mostly focuses on the AngularJS frontend which is used to communicate with and control the drones as well as analyze the maps being created while the drone is still in the air.

DISSERTATION DEFENSE Department of Computer Science and Engineering University of South Carolina Candidate: Yang Gao Advisor: Dr. Jason D. Bakos Date: November 13, 2014 Time: 4:15pm-5:15pm Place: Swearingen Building, 3A75 Abstract Embedded system-on-chip processors such as the Texas Instruments C66 DSP and the IBM Cell provide the programmer with a software controlled on-chip memory to supplement a traditional but simple two-level cache. By decomposing data sets and their corresponding workload into small subsets that fit within this on-chip memory, the processor can potentially achieve equivalent or better performance, power efficiency, and area efficiency than with its sophisticated cache. However, program controlled on chip memory requires a shift in the responsibility for management and allocation from the hardware to the programmer. Specifically, this requires the explicit mapping of program arrays to specific types of on chip memory structure and the addition of supporting code that allocates and manages the on chip memory. Previous work in tiling focuses on automated loop transformations but are hardware agnostic and do not incorporate a performance model of the underlying memory design. In this work we will explore the relationship between mapping and allocation of tiles for stencil loops and linear algebra kernels on the Texas Instruments Keystone II DSP platform.

Hey everyone. I'll be giving an informative talk tonight about research opportunities and summer positions. It will primarily cover REU programs and National Lab programs, which I was involved in the past two summers. I encourage everyone to come out and tell others as well. I especially encourage freshman and sophomores and even those not in ACM or even computing since the information will be applicable to anyone. Thanks everyone! Nick Weidner More Info.

Dissertation Defense Department of Computer Science and Engineering University of South Carolina Candidate: Jeremiah Shepherd Advisor: Dr. Jijun Tang Date: November 11, 2014 Time: 3:00pm-5:00pm Place: Swearingen (3A00, Dean’s Conference Room) Abstract In recent years, gaming research has taken off. In this work, we show that effectively implementing systems that are based in theoretical research, and combining that with gaming practices that these artifacts can be effective research tools. The first work is based on new theories in speech pedagogy, and demonstrates its effectiveness. Next, the following work will show that using a game which simulates therapeutic speech practices can aid in the study of rehabilitation. Finally, the last work will show how using game practices with a large scale visualization could potentially result in scientific breakthroughs in the biologic community. Ultimately all of these works show the multi-disciplinary use of games in scientific research.

DISSERTATION DEFENSE Department of Computer Science and Engineering University of South Carolina Candidate: Fan Zhang Advisor: Dr. Jason Bakos Date: November 10, 2014 Time: 9:00am-10:00am Place: Swearingen (3A75) Abstract The Texas Instruments C66x Digital Signal Processor (DSP) is an embedded processor technology that is targeted at real time signal processing. It is also developed with a high potential to become the new generation of coprocessor technology for high performance embedded computing. Of particular interest is its performance for stencil computations such as those found in signal processing and computer vision tasks. A stencil is a loop in which the output value is updated at each position of an array by taking a weighted function of its neighbors. Efficiently mapping stencil-based kernels to the C66x device presents two challenges. The first one is how to efficiently optimize loops in order to facilitate the usage of Single Instruction Multiple Data (SIMD) instructions. On this architecture, like most others, SIMD instructions are not directly generated by the compiler. The second problem is how to manage on-chip memory in a way that minimizes off-chip memory access. Although this could theoretically be achieved by using a highly associative cache, the high rate of data reuse in stencil loops causes a high conflict miss rate. One way to solve this problem is to configure the on-chip memory as a program controlled scratchpad. It allows user to buffer a 2D block of data and minimizes the off-chip data access . For this dissertation, we have accomplished two goals: (1) Develop a methodology for optimization of arbitrary 2D stencils that fully utilize SIMD instructions through microachitecture-aware loop unrolling. (2) Deliver an easy-to-use scratchpad buffer management system and use it to improve the memory efficiency for 2D stencils. We show in the results and analysis section that our stencil compiler is able to achieve up to 2x speed up compared with the code generated by the industrial standard compiler developed by Texas Instruments, and our memory management system is able to achieve up to 10x speed up compared with cache.

Cyber Security Club meeting.

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