Steering Model-Based Test Oracles to Admit Real Program Behaviors

Friday, February 13, 2015 - 09:30 am
Swearingen 1A03 (Faculty Lounge)
COLLOQUIUM Gregory Gay Department of Computer Science and Engineering University of Minnesota Date: February 13, 2015 Time: 0930-1100 Place: Swearingen 1A03 (Faculty Lounge) Abstract There are two key artifacts necessary to test software, the test data - inputs given to the system under test (SUT) - and the oracle - which judges the correctness of the resulting execution. Substantial research efforts have been devoted towards the creation of effective test inputs, but relatively little attention has been paid to the creation of oracles. The specification of test oracles remains challenging for many domains, such as real-time embedded systems, where small changes in timing or sensory input may cause large behavioral differences. Models of such systems, often built for analysis and simulation before the development of the final system, are appealing for reuse as oracles. These models, however, typically represent an idealized system, abstracting away certain considerations such as non-deterministic timing behavior and sensor noise. Thus, even with the same test data, the model’s behavior may fail to match an acceptable behavior of the SUT, leading to many false positives reported by the oracle. This talk will present an automated framework that can adjust, or steer, the behavior of the model to better match the behavior of the SUT in order to reduce the rate of false positives. This model steering is limited by a set of constraints (defining acceptable differences in behavior) and is based on a search process attempting to minimize a numeric dissimilarity metric. This framework allows non-deterministic, but bounded, behavior differences, while preventing future mismatches, by guiding the oracl--within limits--to match the execution of the SUT. Results show that steering significantly increases SUT-oracle conformance with minimal masking of real faults and, thus, has significant potential for reducing false positives and, consequently, development costs. Gregory Gay is a Ph.D. candidate and NSF graduate fellow in the Department of Computer Science and Engineering at the University of Minnesota, working with the Critical Systems research group. His research interests include automated testing and analysis--with an emphasis on test oracle construction--and search-based software engineering. Greg previously received his BS and MS from West Virginia University and has held short-term research positions at NASA's Ames Research Center and the Chinese Academy of Sciences.

Women in Computing / ACM Joint Meeting

Thursday, February 12, 2015 - 06:00 pm
SWGN 2A14
What: Women in Computing / ACM Joint Meeting When: Thursday, February 12th at 6:00pm Where: 2A14  
  1. Come show off your CS knowledge with a game of Jeopardy! WiC vs ACM... Who will win???
  2. If you are interested in participating in Fix-IT day (Feb. 28th) this semester we will also discuss the logistics!
Added Incentives: PIZZA!!! More Info

Torturing Storage Systems for Fun and Profit

Friday, February 6, 2015 - 09:30 am
Swearingen 1A03 (Faculty Lounge)
COLLOQUIUM Department of Computer Science and Engineering University of South Carolina Mai Zheng Department of Computer Science and Engineering The Ohio State University Date: February 6, 2015 Time: 0930-1100 Place: Swearingen 1A03 (Faculty Lounge) Abstract Storage system failures are extremely damaging---if your browser crashes you sigh, but when your family photos disappear you cry. So we need highly reliable storage systems that can keep data safe even under failures. Such high standard of reliability is far from trivial to provide, particularly when high performance must be achieved. This leads to complex and error-prone code---even at a low defect rate of one bug per thousand lines, the millions of lines of code in a commercial online transaction processing (OLTP) database can harbor thousands of bugs. In this talk, I will focus on two of my research efforts to better understand the reliability of data storage systems under failures. First, I will discuss a framework for evaluating solid-state drives (SSDs). This work uncovers five failure behaviors of SSDs, including bit corruption, shorn writes, non-serializable writes, metadata corruption, and total device failure. The surprising results provide important implications to the design of higher-level storage software and have led to the enhancement of power loss protection in some latest SSDs. In the second part, I will detail a framework to expose and diagnose atomicity, consistency, isolation, and durability (ACID) violations in databases under failures. Using the framework, we study eight widely-used databases. Surprisingly, all eight databases exhibit erroneous behavior. For the open-source databases, we are able to diagnose the root causes using our framework, and for the proprietary commercial databases we can reproducibly induce data loss. Mai Zheng is a Ph.D. candidate in the Department of Computer Science and Engineering at The Ohio State University. His research spans software reliability,storage systems, parallel and distributed systems, operating systems, and high-performance computing. He has been in close collaboration with HP Labs since 2012. His work appears in venues such as OSDI, FAST, PPoPP, as well as in ZDNet, Splashdot, Infoworld, and the RISKS Digest. Mai earned his bachelor's degree from Qingdao University in 2006 and his master's degree from University of Science and Technology of China in 2009.

Energy Proportional Datacenters

Friday, January 30, 2015 - 09:30 am
Swearingen 1A03: Faculty Lounge
Datacenters provide the infrastructure backbone necessary to support big data analytics and cloud services, which are increasingly employed to tackle a diverse set of grand challenges. But datacenter power consumption is growing at an unsustainable pace. In order to keep up with the hyperscale growth in datacenter demand, it is imperative that datacenters become more energy efficient. Servers, the largest power consumer in datacenters, are optimized for high energy efficiency only at peak and idle load, but rarely operate in that region. Therefore, there is a need for energy proportional computing, where servers consume power in proportion to their utilization. How to achieve or surpass ideal energy proportionality is the focus of this talk. Toward this goal, I will first present a historical trend analysis of energy proportionality, using novel metrics, in order to identify opportunities for proportionality improvements. Second, I will present KnightShift, a heterogeneous server architecture that tightly couples a low-power Knight node with a high-power primary server, which achieves near-ideal energy proportionality. Finally, I will present the implications of high energy proportional servers on cluster-level energy proportionality. We find that traditional cluster-level energy proportionality techniques may actually limit cluster-wide energy proportionality, and it may now be more beneficial to depend solely on server-level low power techniques such as KnightShift; a finding that is a major departure from conventional wisdom. Daniel Wong is a PhD candidate in Electrical Engineering at the University of Southern California. His research focuses on energy efficient design of computer systems, from data center scale to micro-architecture scale, through cross-stack solutions spanning from circuits to runtime systems. His research has been recognized as one of IEEE Micro?s Top Picks in Computer Architecture for 2013. He held research internship positions at Samsung Semiconductor, Inc. and Lawrence Livermore National Lab. He earned his MS in Electrical Engineering in 2011, and BS in Computer Engineering and Computer Science in 2009, both from the University of Southern California. More information can be found at http://www.danielwong.org.

S.E.T. Career Fair

Tuesday, January 27, 2015 - 12:00 pm
Columbia Metropolitan Convention Center

Design of Secure and Anti-Counterfeit Integrated Circuits

Friday, January 23, 2015 - 09:30 am
Swearingen 2A11
As electronic devices become increasingly interconnected and pervasive in people's lives, security, trustworthy computing, and privacy protection have notably emerged as important challenges for the next decade. The assumption that hardware is trustworthy and that security effort should only be focused on networks and software is no longer valid given globalization of integrated circuits (ICs) and systems design and fabrication. The design of secure hardware ICs requires novel approaches for authentication that are based on multiple factors that is difficult to compromise. Equally important is the need for protecting intellectual property and design of integrated circuits that are harder to reverse engineer. In this talk, I will explore both of the authentication-based and obfuscation-based hardware protection approaches. One popular technique of authentication-based protection is Physical Unclonable Functions (PUFs) which provide a hardware specific unique signature or identification. I will provide an overview of the reconfigurable PUF structures and circuits that could achieve higher security. Next, I will present a novel low-overhead solution to design Digital Signal Processing (DSP) circuits that are obfuscated both structurally and functionally by utilizing high-level transformation techniques. Finally, I will describe the theme of my future research: security, randomness, and computing. Yingjie Lao, PhD candidate at University of Minnesota,

Women in Computing@USC Meeting

Thursday, January 22, 2015 - 06:00 pm
3A75 (Swearingen)
Hopefully your semester is off to a good start. Just a reminder that we will have our first meeting tomorrow night at 6:00pm in 3A75 (Swearingen). It will be a great opportunity to learn about summer internships! More info at their Facebook Group.

ACM Student Meeting

Wednesday, January 21, 2015 - 05:00 pm
Swearingen, ACM room
Hi everyone! We are getting ready to kick off the semester with our first meeting this Wednesday, January 21st at 5 pm. The main focus for this meeting will be getting a list of our members so we can submit the names to the national ACM organization. If you cannot come to the meeting, please send me your name, email address, and please indicate if you are a national ACM member. Thank you! See here for details.

High Performance Meta-Genomic Gene Identification

Wednesday, December 3, 2014 - 02:00 pm
Swearingen (1A03, Faculty Lounge)
DISSERTATION DEFENSE Department of Computer Science and Engineering University of South Carolina Candidate: Ibrahim Savran Advisor: Dr. John Rose Date: Wednesday, December 3, 2014 Time: 2:00pm Place: Swearingen (1A03, Faculty Lounge) Computational Genomics, or Computational Genetics, refers to the use of computational and statistical analysis for understanding the structure and the function of genetic material in organisms. The primary focus of research in computational genomics in the past three decades has been the understanding of genomes and their functional elements by analyzing biological sequence data. The high demand for low-cost sequencing has driven the development of high- throughput sequencing technologies, next-generation sequencing (NGS), that parallelize the sequencing process, producing thousands or millions of sequences concurrently. Moore's Law is the observation that the number of transistors on integrated circuits doubles approximately every two years; correspondingly, the cost per transistor halves. The cost of DNA sequencing declines much faster, which implies more new DNA data will be obtained. This large-scale sequence data, produced with high throughput sequencing technologies, needs to be processed in a time-effective and cost-effective manner. In this dissertation, we present a high-performance meta-genome gene identification framework. This framework includes four modules: filter alignment, error correction, and gene identification. The following chapters describe the proposed design and evaluation of this pipeline. The most computationally expensive kernel in the framework is the alignment procedure. Thus, the filter module is developed to determine unnecessary alignment operations. Without the filter module, the alignment module requires 1.9 hours to complete all-to-all alignment on a test file of size 512,000 sequences with each sequence average length 750 base pairs by using ten Kepler K20 NVIDIA GPU. On the other hand, when combined with the filter kernel, the total time is 11.3 minutes. Note that the ideal speedup is nearly 91.4 times faster when new alignment kernel is run on ten GPUs (10*9.14). We conclude that accuracy can be achieved at the expense of more resources while operating frequency can still be maintained.